Thursday, December 2, 2021

Big Verilog source update on OpenCores.org

November 15th, 2021, marked the 50th anniversary of the release of the MCS-4 chipset. I figure this is as good a time as ever to update my MCS-4 project on OpenCores.

 Here's a summary of the changes:

  • Created subdirectories under rtl/verilog for each of the four initial MCS-4 chips. 
  • Moved the i4004 CPU-specific Verilog module files into the i4004 subdirectory.
  • Updated the i4004 CPU Verilog modules with a few bugfixes.
  • Published Verilog modules for the i4001 ROM, i4002 RAM, and i4003 Shift Register chips.

These are the Verilog sources I used in my Busicom 141-PF re-creation using a gutted Canon P170-DH calculator, so I'm pretty sure they work correctly.

Let me know if you find these files useful, or if you find what you think is a bug.

 

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