Keyclick sounder tests

Today dawned dreary and rainy, so I decided I needed to spend some time working on the Canon P170-DH calculator rebuild. I pulled out my checklist of things that needed testing and decided to start with the audible keyclick sounder.


Before I decided I could make the fluorescent display of the P170-DH work, I decided that it would be advantageous to provide an audible feedback to indicate that a key had been pressed and recognized. I described my search for the "right" sound in my posting Tick... tick... tick... a couple of years ago, and I did a proof of concept using a 556 dual timer and a piezoelectric sounder. But I'd never actually tried driving the final circuit from an FPGA, figuring there really wasn't much to test with such a simple circuit.

The code to drive this thing is pretty trivial. Divide the external 20 MHz clock down to 4 KHz and use that to generate a 2 KHz square wave. Gate that so it drives the keyclick pin for 15 milliseconds once per second. Taa daa! Barely 64 lines of Verilog including the comments. Simulate it just to be sure. Hook up my laptop to the JTAG, power up the calculator board, and.... nothing. No clicks. No squeeks. Not a peep.

I fired up my oscilloscope and put the probe on the gate of the FET. What do I see but a 15 ms burst of a perfect 2 KHz square wave once every second. Moving the probe to the piezo sounder showed a constant 7 volts. Did I trash this FET somehow? Probing each of the pins on the FET I suddenly heard a the ticking or clicking sound I was expecting, but only with the scope probe on the FET's drain pin. That made no sense... until I put the board under my microscope.

Someone please remind me NOT to assemble boards when I'm recovering from being sick. I have spent more time chasing down assembly problems on this board than I ever have before.

Since the piezo sounder is driven by the unregulated +7.5V supply and potentially generates spiky noise, I located it and its driver FET on the far edge of the board away from the FPGA and other sensitive circuitry. When reflowing the solder paste I somehow managed to heat this area hot enough for the FET to be stuck solidly but not hot enough to reflow all the solder paste. It still had the appearance of dried solder paste rather than reflowed solder.

Once the soldering iron had a chance to heat I touched up three pins on the FET. Moving the board back to my test bench I powered to board and loaded the FPGA, and was greeted by the audible ticking sound I've been seeking.

Now I just have to give it a reason to click.