For some reason I've been hesitant to test my keypad design. Maybe because it's something that is either going to work right or I'm going to have to scrap the board and have another one fabricated. But I figured it was time to find out.
High on my eventual success with the keyclick sounder, I decided to test the keypad and associated slide switches. My original plan was to do a simple "walking ones" test to make sure each keypad column could be driven high or low. However, because I decided to put Schmitt trigger inverters between the keypad row tracks and the FPGA pins, I couldn't do the same for the rows. To see what the row inputs were getting I decided to drive the 32-bit debug connector with both the column outputs and the row inputs. Having gone that far I added the inputs from the slide switches to the debug connector too.
This is not a full-blown keypad scanner and decoder. I'll get there at some point, but all I wanted to see was the gazintas and gazoutas on my logic analyzer. This I managed in 83 lines of Verilog, including comments.
After loading the FPGA I was pleased to see the walking-one pattern on my logic analyzer, but that's generated from within the FPGA itself. I used my oscilloscope to probe each of the keypad column lines to make sure they all were being driven in the right sequence. Then using the rounded end of a hook lead I shorted individual keypad patterns and observed the expected results on the logic analyzer. All this seemed to be working well.
The same could not be said for the slide switch inputs. Most were reading low, with one or two showing high. Rather than providing external resistive pull-ups on these pins I'd planned to use the FPGA's weak pull-ups instead. A quick check showed I'd forgotten to enable the pullups, and doing so caused all the slide switch inputs to go high. Except for one, of course. It seems like nothing on this project goes quite as planned.
The oscilloscope showed the one pin that was still showing low actually had about 1.3V on it. That seemed really strange. Looking at the schematic I tracked that circuit back to the FPGA pin, and then examined that pin under the microscope. Sure enough there was a solder bridge connecting it to the adjacent pin. This pin is connected to one of the fluorescent display segment drivers, so there was a path to ground through a resistor and a bipolar transistor. Firing up my soldering iron for the second time I cleared the solder bridge and that fixed the problem with that pin.
At this point I decided there was no good reason not to mate the board with the calculator's upper shell. That meant removing the 20 (yes 20) mounting screws, removing the fit-test board, sliding the real board board into place, and reinstalling all 20 screws. I slid the on/off switch to "off", and flipped the switch on the bench power supply. To my delight the current draw was almost nil, meaning that the on/off switch was keeping the voltage regulators in their "off" state. Sliding the switch to "on" brought the regulators online and current draw rose to its normal level.
While watching the logic analyzer display I pressed one of the keypad switches and noted that when that column was selected the row output switched state. One by one I checked each of the 37 keys on the keypad and all of them appear to work properly. I then slid each of the slide switches to each of their positions and they, too, work.
Woo hoo!
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