M-32TL Printer timing revisited

While browsing through my accumulated datasheets related to this project I found one for the Toshiba TC83230-0015 calculator chip. The information in it is sparse but it specifically mentions the Epson M31/M31A printer. The suggested system block diagram includes one tiny clue:

More thoughts on i4004 clocking

Much of my concern, as expressed in previous posts like A clocking nightmare, have been based on the assumption that reflections on one of the two clock lines could cause multiple edges and thus multiple clocking of edge-sensitive circuits. While this would be correct with modern edge-clocked flip-flops, I don't think it applies to the original 4004 circuitry.

Fighting router's block

I've been quite busy at work -- you know, the thing that pays the bills -- so I haven't had much time to work on my hobby projects. When I have had time, I've found myself tinkering with small layout details and not making much progress in the routing of the board as a whole. I think of it as "router's block", akin to writer's block where you just can't seem to make much progress.

Rattling around in the back of my mind is still the question of how bad the clock distribution on my discrete component i4004 boards is. I'm hoping to find time to sit down at my electronics bench and really take a look at what the clock signals look like now. But how would I tell how adding a second (and, later, a third, fourth, and fifth) board would affect this?

Late one night it occurred to me that when I had the Instruction Pointer board fabricated I got two boards. The idea was to avoid a situation where I screwed up one board and had to wait for another to be fabricated and shipped from Europe, and it would serve as a reference if I wanted to check connectivity. Since the essential BSS83 MOSFET is no longer available I have little use for this second board. So why not use it to help test the clock distribution behavior!

All I need to do is mount connectors on this board and I have a ready-made second board to add to the board stack. Since I don't need this board to be functional, I can add whatever loads I might want to the clock lines and see what effects it would have while probing with my 'scope.

Now all I have to do is find the frelling thing. I've found the packaging these boards were shipped in (seven years ago!) but it's empty. I looked in all the obvious places for it, such as the box containing most of the components for this project, but thus far I haven't found it. This might actually be the incentive I need to properly organize my electronics lab.

Flipping the P170-DH board in KiCad

After flipping the power subsystems from the front of the board to the back and fixing up the layouts, the only parts remaining on the front of the board are the VFD, a filter capacitor, and the power fuse. Everything else is going to be mounted on the back. Thus it occurred to me that when I do most of my work with this board, I'm going to be looking at the back. That's where almost all of the components are. And once the board is mounted in the calculator's upper shell behind the keypad, the back is the only side I'll be able to see.

KiCad allows me to flip the display of the board in the pcbnew board editor. However, if I print an image of the board it's still the view from the front that gets printed. That means I'd either have to be looking at the board layout on a computer when placing parts and debugging, or mentally transpose component positions from a printed image. That didn't sound appealing.

The benefits of networking

One of the presentations I attended at KiCon 2019 was one entitled "Preserving History with KiCad" by James, the self-professed "Bald Engineer". Given my work with recreating the Intel 4004 CPU, his presentation sounded interesting to me.

Making Xilinx ISE 14.7 run on Ubuntu 18.04

While cleaning my office I came across a timing diagram I'd drawn for an HDMI decoder I'd starting writing for the Digilent Atlys board, which has a Xilinx Spartan 6 FPGA. Curious to see how far I'd taken this project, I fired up the Xilinx ISE IDE. Or at least I tried to.

The last time I ran ISE I was running a derivative of Ubuntu 16.04. Now that I'm running a derivative of Ubuntu 18.04, ISE wouldn't run. And since ISE hasn't been updated since 2013 (and won't be), this is a problem. Here's the error message I got:

libpng warning: Application jmp_buf size changed

Flipping the P170-DH power circuit layout

Last August I realized why some components on the original Canon P170‑DH calculator were mounted on the top of the board and some were mounted on the bottom: placing the through-hole components on top and the SMDs on the bottom allowed everything to be soldered on the bottom side of the board. That may have been a requirement, given the use of carbon tracks on the top side.

The original board used through-hole components for the power section. On my replacement board the only through-hole components are connectors, a fuse, and an electrolytic filter capacitor. None of the ICs I'm using are available in through-hole packages, and the FPGA has to be mounted on the bottom of the board because there isn't enough room to mount it other than behind the keypad.

Following the layout of the original board I'd placed the power section components on the top of the replacement PC board. Recently, though, I've reconsidered that arrangement. I'm just a bit concerned about surface-mount components already soldered on one side coming loose while later soldering the components on the other.

After making sure the schematic and board files were checked into my content management system (I use Git) I spent an evening flipping the power section circuits onto the bottom of the board. This required re-routing most of the circuits, and I took the opportunity to rearrange some of the circuits to make room for some components I hadn't placed yet. I haven't finished the re-route yet, but I'm happier than I was.