Sunday, March 10, 2019

Converting IBIS to Spice

One of the things that has been frustrating me is my inability to properly simulate the CCLK I/O on the Spartan-6 FPGA. Many chip vendors don't want to reveal too much about the structure of their devices, so rather than giving Spice definitions for their interfaces they provide IBIS (I/O Buffer Information Specification) definitions. With the proper tools, IBIS allows for efficient simulations without having to simulate the device's entire I/O buffer circuit.

The problem is that none of the freely available Spice circuit simulators understands IBIS. Commercial simulators are available, but the cheapest one I found cost almost $300 for a 3-month license and some run into the tens of thousands of dollars.

There have been some attempts to provide translators to convert an IBIS definition into a Spice circuit. One is available from Intusoft, but it dates from 1998 and only supports up to IBIS v2.0. The Xilinx Spartan-6 IBIS files are v4.2, and the latest IBIS spec is v6.1 (v7.0 is being voted on). Another was available from SpiSim as a web service, but it appears Oracle's change in Java licensing terms caused it to be withdrawn.

However, SpiSim also posted a couple of blog articles on converting IBIS files for use with free Spice simulators in preparation for a presentation they made at DesignCon 2016. The first article (here) mostly describes the operation of the Intusoft conversion, and references the efforts of a member of the comp.arch.fpga newsgroup to make this conversion work with ngspice. The second article (here) appears to describe the improved conversion capabilities in the Pro version of their software.

The SpiSim articles, along with the IBIS Open Forum specifications (here) and some other articles I've found, really help explain how simulation with IBIS works. The example IBIS files and the converted Spice decks provided by Intusoft and SpiSoft are invaluable to understanding how the conversion is done.

If only there was a free converter available...

One of the nice things about hobby projects is there is no one demanding you meet a schedule. Which is a good thing, if you've followed this blog long enough to notice the months-long gaps in activity. It also means I can go off on tangents and not justify the hours to anyone but myself.

I'm an embedded C/C++ programmer by profession, but I've been looking for an interesting project with which to teach myself Python. So I started thinking about how to write such a converter. Doing it in Python would make the result more easily usable by others and avoid the nightmare that Oracle is making of Java. Not being familiar with Python I started researching input string parsing, and realized this was going to take a while to learn. For grins and giggles I called up my favorite search engine and searched for "python ibis parser". Well, what do you know! In 2012, Russ Dill at Arizona State University posted an IBIS parser for Python called PyBIS, and it's licensed under the LGPL. (Don't confuse this with the pyBIS interface to openBIS, which is "an open, distributed system for managing biological information." We're not doing biology here.)

With the IBIS parsing taken care of I could focus on the fun part, which is figuring out how to produce Spice subcircuits following a similar process as used by Intusoft and SpiSim. It's taken most of the day, but I have a Python program that will take the Spartan-6 IBIS file and spit out a Spice-like deck. I say "Spice-like" because LTspice chokes on one of the first cards in the deck, but I think that's because LTspice doesn't like the variant of the Spice language the program produces rather than some basic problem in the conversion.

I also need to take another look at some of the math. To describe an I-V (current-voltage) relationship, IBIS gives a table stepping through various output voltages and the resulting current. The Spice conversion uses a "B" component to implement a piecewise linear interpolation (PWL) function. The math in their interpolator seems broken to me so I've derived my own.

Surprisingly, it's taken only around 120 lines of Python to make all this work. Of course, that's in addition to the 2177 lines of Python that make up the pybis.py module.

I have an aversion to posting broken code, but when it's ready I'll throw it out somewhere under a Creative Commons BY-NC-SA (Attribution-NonCommercial-ShareAlike) license.

6 comments:

  1. Hi there,

    Any updates on your Ibis to Spice translator. It sounded promising.
    I was thinking about creating a version for LTSpice, and before starting decided to look around to see if someone already did it.
    Do you have something working?

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    1. No, sorry. Like many of my little projects, that one got shelved until I "have more time". Which is kind of like waiting for Godot.

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  2. Hi. I am poking around with Spisim and was just able to do my first simulation of an Altera MAX 10 3.3V LVTTL output pin. I just wanted to point out that Spisim is actually working and that it may be less work than going with the python implementation. The IBIS version of the MAX 10 IBIS file is 5.0

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  3. There is a free converter available here: https://github.com/kamratia1/pybis2spice

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    1. I haven't tried this yet, but it looks really interesting! Thanks for posting it.

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  4. PSpice can also be used for IBIS simulations. The commercial version of PSpice has a built in IBIS to PSpice converter but the models can be difficult to use. Also, the free PSpice to TI program does not have access to this converter. I made an IBIS model converter with several improvements including:

    - Driver models have a weak pull up resistor to the ENABLE pin so the I/O driver model is enabled by default (no external circuit required). This pin can be pulled low to force the output into a high impedance state.
    - ENABLE pins are always assumed to be active-high.
    - Input models give a probe point at the die (where we actually care) and not just the pin.

    You can check out the tool here: https://emisleuth.com/Tools/IBIS-to-PSpice.html

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