Here's a snapshot:
The six-layer stackup is:
| Layer | Color | Usage |
|---|---|---|
| 1 | Red | Top: SMD pads, simple routing |
| 2 | Hatched Red | Ground plane — not shown |
| 3 | Dotted Green | Unused, probably inter-board nets |
| 14 | Light blue | Mostly vertical routing |
| 15 | Hatched Blue | VDD (power) plane — not shown |
| 16 | Blue | Bottom: Mostly horizontal routing |
All of the VDD and GND nets have been routed. Ratsnest shows only 58 airwires remaining, though that will rise when I finish assigning inter-board nets to connector pins.
At this rate I could have both the ALU and ID boards completely laid out in a week or three. That assumes that I decide to keep using FDV301 and BSS83 FETs as high-side push-pull drivers and not switch to DMN26 parts.

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