Sunday, April 21, 2013

ALU and ID board progress

I don't know what I did to annoy my sinuses, but I haven't been able to breathe through my nose all day. This has really put a damper on my plans for the day, as I really haven't wanted to be far from a box of tissues. Since I'm otherwise clear-headed, I parked myself in front of my computer and worked on the layouts.

The ALU board now has only 161 airwires remaining, of which 21 go to GND and 11 to VDD. That's down significantly from 560/141/79 on Friday. I don't think I want to do much more with it until I pin-out the remaining inter-board connections. In order to do this I need to work on the Instruction Decoder board.

The ID board didn't have a power plane defined, so very few of the VDD connections had been made. I rectified that, then spent some time adding short stubs and vias. It now has 182 airwires remaining, of which 64 go to GND and 28 to VDD. That's down from 622/322/109 two weeks ago.

While the ALU board has a few channels with clusters of vertical signal traces on the VDD plane, the ID board has lots of vertical signal traces spaced across the board. There are also pull-up resistors in many of the gaps, so current will be drawn through these narrower areas. This will require some attention to make sure I don't end up with islands.

There hasn't been much visible change unless you look really closely, so I won't bother posting pictures today.

Saturday, April 20, 2013

ALU board power plane

With 560 airwires still unrouted, I'm clearly not done with the ALU board. But there's enough to see how the long vertical signal traces break up the power plane, yet leave wide top-to-bottom paths to supply VDD.

At least you'll be able to see it if you make the image large enough! The original is 2560 x 1569 pixels (shrunk to 1600 x 980 by BlogSpot) so there should be plenty of detail.

If this was a truly high-speed logic board with fast rise times, the current would have to detour around the the long vertical breaks in the plane rather than being able to follow the same path as the horizontal signal traces (not shown here). To work around this I'd need very low impedance bypass capacitors between VDD and GND to allow the current to jump to the unbroken ground plane. Or so sayeth the book -- I don't have the personal experience to be able to vouch for it.

I'm actually making pretty good progress on this board, though at this rate it'll be at least another month before I have the ALU and ID boards ready to send off to PCB-Pool for fabrication.

Friday, April 19, 2013

Power planes revisited

This posting has been rewritten for clarity.

This evening, while sitting at a stoplight, I was mentally reviewing the various techniques for routing power and ground addressed in High-Speed Digital Design, A Handbook of Black Magic. One of the techniques mentioned was the "power and ground grid" (pg. 197), where ground traces run horizontally between ground busses along the vertical edges, and the power traces run vertically between power busses along the horizontal edges. The authors of the book do not favor this technique for a variety of reasons they explain in detail. But then they're writing about systems with rise times of 1ns or less, and that's an entirely different world.

In my case, the fall times of my signals are short, measuring just a few nanoseconds on my breadboard. On the breadboard I've seen situations where signals fall well below ground level, rebound to almost +1V (uncomfortably close to Vgs[th] for the the FDV301N), then fall back to ground. Probing the Instruction Pointer board, with its unbroken ground plane, has shown none of that nonsense. This argues strongly for an unbroken ground plane for the other boards.

In contrast, the rise times of my signals are quite long. The fastest of the rise times seem to occur in circuits like that to the right, where a B-type pull-up resistor (2.2K in my implementation) drives the high-side of a push-pull driver. Even in this circuit, though, the rise time is about 25ns from ground to +1V and follows an RC curve above that. This suggests that routing power as in the "power and ground grid" technique wouldn't cause a problem.

While contemplating the best way to achieve this, the most obvious solution in the world came to mind. Deciding that I don't need a power plane is different than having to route power traces individually. All I have to do is be careful when routing signals on this layer to avoid creating any islands or placing VDD vias in narrow areas.

Sunday, April 14, 2013

Disappearing parts

It might seem like I'm a bit paranoid about single-source parts like the NXP BSS83. When I decided to actually build the discrete-part 4004 CPU, one of the first things I did was order enough of all the parts I'd need to build the whole project, plus extras for goofs. Since then I've received several courtesy notices from DigiKey about parts becoming obsolete, but all of them would be easily replaceable if I'd needed them. But I already have everything except the PCBs.

I have another project going which involves very low power RF circuits. It's another one that I started a couple years ago and work on in fits and starts. My plan was to build 5 or 6 of these little devices, and I carefully acquired what I thought would be the critical bits. I'd had 6 PCBs made and assembled two. This evening I decided to assemble another three for a larger-scale test. The only thing I don't have on hand are the #6-32 nylon screws that hold the PCB to the plastic case, so I went over to my local big-box hardware store where I'd bought them before. They no longer carry them. They didn't sell enough of them to waste the shelf space on them.

Why nylon? Metal has a way of detuning tuned electronic circuits so I don't want metal screws that close to the antenna.

This is not a major catastrophe. I can get suitable screws elsewhere. The big-box store will even let me order them in reasonable quantity and deliver them for pickup at the store at no cost -- with a 10-day lead time. But I wanted them tonight.

The moral of the story is that it's a really good idea to buy everything when you start, because you never know what will disappear or become harder to get.

Thursday, April 11, 2013

Co się dzieje w Polsce?

What is happening in Poland?

This is not the most popular blog in the world, but I do get views from just about every country in the world. Over the last few months, though, my views from Poland have risen until they account for more than half of views for any given period. Did I become required reading for an Electrical Engineering class? Or maybe a Technical English class?

Edited 2013-08-17 to add:

Apparently these accesses are what is known as "referer spam" (sic). Some people put a widget in their blogs that automatically provides links back to those sites which bring them the most traffic. By bombarding a blog with fake views, the back-links to these fake referrals cause the spamming site to rise in search engine rankings. Most of these fake referrals link to porn or malware sites.

Since I don't provide such automatic back-links, and I never click on any suspect referral link, their spamming does nothing but screw up my statistics. Fortunately, my stats are merely a curiosity for me.

ALU board component placement done

Just a quick snapshot of the Arithmetic/Logic Unit board before I call it a night. I got all the remaining components roughly placed. When I place components I'm always considering how to route signals, but I expect to have to do a little rearranging when I actually route them.

And there are a lot of signals to route. A ratsnest command reports 1100 airwires, including 326 GND and 135 VDD. Like the Instruction Decode board, this board has a full ground plane on layer 2, but VDD will have to be routed like any other signal.

Wednesday, April 10, 2013

ALU board layout update

Since I've moved the Instruction Decode board along a good way, I decided the Arithmetic/Logic Unit board needed some attention.

Part of the problem with putting a project on hold like I sometimes do is that all the details of where you left off get flushed from mental cache, and it can take a half an hour or more just to figure out what needs doing. With the ALU board it appears I'd left off with only 21 FETs and 10 resistors unplaced, but almost nothing had been routed. With that figured out I settled in to place the rest.

I thought someone out there might want to see what my screen looks like doing this. I have a 30-inch, high-resolution (2650x1600 pixels) monitor, which allows me to display both the active portions of the schematic and the board layout at the same time without having to squint.

Eagle Schematic and Board Layout views -- i4004 ALU board

In this screen capture, I've just selected transistor T0172, which highlights the part on both the schematic and board windows. The grid displayed on the board is 16 mil squares, which I've found to be about as tightly packed as I'd want to attempt with these parts and my skill level.

We have contact!

Tim McNerney and I have established contact! If that name doesn't ring a bell, it should: he's the guy who envisioned the recreation of the Intel 4004 in the first place, got Intel to make available the schematics, and inspired others to help bring his vision to life. He's also the author of the Intel 4004 — 35th Anniversary Project web page -- if you're interested in the 4004 and haven't read his page, go there NOW.

During our conversations another option for MOSFET choices came to my attention. Rather than searching for one of the scarce few 4-terminal discrete FETs, it's possible to use two devices back-to-back to work around the problems created by the body diode created when the FET's substrate is connected to its source:

In this configuration, the two drain terminals can be used interchangeably, while the gate connection is common. In operation, if the left side drain is positive with respect to the right side the body diode on the right will be forward-biased and will conduct, but the one on the left is reverse-biased and the circuit works as intended when the gate is low. Since the FETs themselves will conduct in either direction, there shouldn't even be a voltage drop across the conducting body diode when the gate is high.

There is a drawback to this approach: the gate capacitance is doubled, since the two gates are in parallel. This will result in higher power consumption and possibly slower operation, especially since the 4004 uses resistive pull-ups rather than push-pull circuits in most cases, though there are push-pull drivers in cases where there is high capacitive loading (like in the DRAM arrays) or where timing is critical (like in the ALU).

Another drawback would appear to be increased parts counts. However, dual-FET parts are pretty common in the SMD world. Consider these two examples:

BSS84W -- Single P-Channel MOSFET

BSS84DW -- Dual P-Channel MOSFET
The package dimensions of these two devices are identical, differing only in the number and placement of the leads.

I think I'm going to add a few of these to my next parts order (along with prototyping adapters) so I can experiment with them. I want to see how they behave in a DRAM cell. That's the best part of hobbies -- there's always something to learn!

Friday, April 5, 2013

Another MOSFET option

Given the spool of several hundred BSS83 MOSFETs sitting on my workbench, I'm pretty well committed to my choice of transmission gate FETs. Out of curiosity, though, in an idle moment I found myself searching yet again for an enhancement-mode MOSFET with a separate substrate connection.

And I found not one, but a whole series of them. A company in Fremont, Californa, called Calogic LLC makes a line of high-speed DMOS analog switches (really MOSFETs) that seem quite suitable for use in a project like this one. The packaging is also a SOT-143, though the pinout is different.

Neither DigiKey nor Mouser carry their products. They do have a distributor link on their website, and some of them do sell suitable devices in "small" (less than 2500 unit) quantities. The prices I saw are about 6x that of Mouser's price for the BSS83, but at least there is more than just one device available.

Thursday, April 4, 2013

I'm not dead yet!

Life has slowed down enough for me to have a bit of time to spend with my insanity.

As I've mentioned before, my test jig can't drive enough pins to test either the Instruction Decoder or the Arithmetic Logic Unit separately, so these will have to be assembled and tested at the same time. I'd started a basic layout of the Instruction Decoder but hadn't gotten too far. This evening I made some progress.

All the components have been placed, though I'm not happy with the layout in some areas. A lot of the routing has been done, and what's mainly left is interconnecting the large functional blocks and to the off-board connectors.

For those who like numbers, I have 622 airwires remaining, 322 of which are missing vias from component pads to the ground plane on layer 2. Another 109 are to VDD, though since I don't have a dedicated power plane these will have to be routed just like the remaining 191 signals. I also need to add some bypass capacitors, as the original i4004 schematic has none; this will be especially important given the absence of a power plane.