Wednesday, June 27, 2012

Fun Eagle Features

One of the nice features of the Eagle CAD program is that you can write User Language Programs, or ULPs. These are written in a scripting language that's a bit reminiscent of C++, and gives the end user the ability to access internal data structures without having to know about the inner workings of Eagle.

For example, I wanted to verify that Eagle's view of the components and interconnections matched the netlist exported by Lagos's analyzer. To do this I wrote a short (111 line) ULP to load the netlist and do the comparison. (It matched -- whew!)

Another cool use for a ULP is changing component values. I started off setting all the normal pull-up resistors to 10K Ohms, a value that works on my breadboard (and I happen to have a bag of a few hundred of these). But to reduce the latencies I'm probably going to use 4.7K Ohm resistors. Also, I originally picked 0805 chip resistors, and am now leaning toward 0603 parts instead. Rather than changing each and every part one at a time through the GUI, I can use a ULP to change them all. Or change some of them based on some programmed criteria.

Eagle does have one significant drawback for the hobbyist. Although far less expensive than something like the Cadence OrCad, which starts at $2,500 and goes up from there, the full commercial-use version of Eagle at $1,640 is still out of the price range for most hobbyists. There is a free version, but the limitations of one schematic sheet, board size of 80mm x 100mm and two layers can be rather constraining for a big project. Fortunately they offer a middle ground: a hobbyist-only license for the "standard" version (99 sheets, 160mm x 100mm, 6 layers) for one-fifth the cost ($169). This is the version I have.

Clearly I'm not going to fit almost 2200 components onto a 6.3" x 3.9" PCB. I figured once that it might be theoretically possible to fit all of them onto a PCB the size of a standard piece of paper (US 8.5" x 11", or European A4) but it'd probably have to be larger. A 4-layer board that size would cost well over $500 by itself, and if I made any significant mistakes I'd lose the cost of the board and all the components I put on it. But there are other good reasons not to do that. It'll be easier to test each functional block if they are separate. And after building one board I might decide to scuttle the whole project. Why invest so much money as an all-or-nothing deal? So the board size constraint isn't quite as much of a problem as it might be.

Why not use KiCad? I probably will, for a future part of this project that will require a larger, low part count board. That'll give me a chance to learn the package properly. But I like a lot of Eagle features that KiCad lacks. For example, in the Eagle schematic editor, once you've connected a net to a component pin, it stays connected. If you move the component, the nets stretch and move with it to stay connected. In KiCad, wires connect to a component merely by virtue of starting or stopping at the exact same point on the schematic as the component pin. Move the component a few mils and the wires no longer connect. That seems error-prone to me. And let's face it, like much open-source software, the documentation for KiCad sucks royally. I'm sure I could have figured out how to generate a KiCad schematic programmatically (software engineer, remember?) but Eagle has documented commands to do it.

Tuesday, June 26, 2012


When I started playing with electronics, schematics were hand-drawn on paper vellum, a plasticized cotton material that is stronger than paper and able to withstand multiple erasures. PCBs were laid out on clear plastic sheets in x2 or x4 scale, using die-cut templates for pads and vias and special adhesive drafting tape that could be curved as it was laid down. I still have a x2 negative of some PCB I laid out, though the purpose of the board is lost in time.

That was then. These days, schematics are entered using CAD software. The resulting netlist can be exported to another CAD program for PCB layout. The whole thing is handled digitally until a board house fabricates the actual PCB.

Since I already have schematics of the 4004, I guess I could have skipped right to the PCB layout. But having the schematic entered into a CAD package like CadSoft's Eagle allows electrical rule checks to be applied, verifying that the resulting board matches the schematic. I've been using Eagle for over a decade, so that was my first choice. I gave serious consideration to the Open Source package KiCad, but ended up sticking with Eagle for this project.

But how could I get the schematics into Eagle?

The most obvious way would be to simply enter the schematic by hand. Aside from being a long and tedious process, the possibility of making a mistake ruled out this option.

I contacted Lajos Kintli, the author of the 4004 analyzer, and asked if he had a verified netlist I could use. He informed me that the analyzer could export two different netlists, one that described the schematic and one that described the chip itself. Even better, these netlists identified the components by their location on the bitmap image of the schematic or chip. It quickly occurred to me that I could write a program to identify the schematic symbols in the bitmap and trace the connections. This program could then produce a script that would drive Eagle to recreate the schematic perfectly, including component positioning, orientation, and interconnection. Even the component and net names would be preserved, allowing easy reference between the board, the schematic, and the analyzer.

I started writing the program in C, as that's a language I'm intimately familiar with, but then changed my mind. I have a work-related need to learn Java, so even though my unfamiliarity with the language would make it take a lot longer, I started over. A few weeks and a lot of late evenings later, I had a working program. From the 2176 line netlist and the 1.6 MB schematic bitmap, it produces 40,189 lines of Eagle script. Every component is tagged with attributes identifying its position on the schematic and the chip bitmaps.

It took 3 minutes 50 seconds for Eagle 6.2.0 to digest the script on my main Linux system. That system was built for the specific purpose of building large software projects, so it's probably not a good benchmark. One of the tech support folk at CadSoft USA ran the same script on his Windows-based general-purpose computer, and he said it took 20 minutes. If printed 1:1 scale, the resulting schematic would measure 100.5" x 81.25" (or 2.55m x 2.06m). Here's a screen-shot of the schematic editor:

Anyone have a really large format printer? Even the Really Big Plotter we have at work won't handle a sheet that wide. Fortunately, I don't need to print it.