Tuesday, June 26, 2012


When I started playing with electronics, schematics were hand-drawn on paper vellum, a plasticized cotton material that is stronger than paper and able to withstand multiple erasures. PCBs were laid out on clear plastic sheets in x2 or x4 scale, using die-cut templates for pads and vias and special adhesive drafting tape that could be curved as it was laid down. I still have a x2 negative of some PCB I laid out, though the purpose of the board is lost in time.

That was then. These days, schematics are entered using CAD software. The resulting netlist can be exported to another CAD program for PCB layout. The whole thing is handled digitally until a board house fabricates the actual PCB.

Since I already have schematics of the 4004, I guess I could have skipped right to the PCB layout. But having the schematic entered into a CAD package like CadSoft's Eagle allows electrical rule checks to be applied, verifying that the resulting board matches the schematic. I've been using Eagle for over a decade, so that was my first choice. I gave serious consideration to the Open Source package KiCad, but ended up sticking with Eagle for this project.

But how could I get the schematics into Eagle?

The most obvious way would be to simply enter the schematic by hand. Aside from being a long and tedious process, the possibility of making a mistake ruled out this option.

I contacted Lajos Kintli, the author of the 4004 analyzer, and asked if he had a verified netlist I could use. He informed me that the analyzer could export two different netlists, one that described the schematic and one that described the chip itself. Even better, these netlists identified the components by their location on the bitmap image of the schematic or chip. It quickly occurred to me that I could write a program to identify the schematic symbols in the bitmap and trace the connections. This program could then produce a script that would drive Eagle to recreate the schematic perfectly, including component positioning, orientation, and interconnection. Even the component and net names would be preserved, allowing easy reference between the board, the schematic, and the analyzer.

I started writing the program in C, as that's a language I'm intimately familiar with, but then changed my mind. I have a work-related need to learn Java, so even though my unfamiliarity with the language would make it take a lot longer, I started over. A few weeks and a lot of late evenings later, I had a working program. From the 2176 line netlist and the 1.6 MB schematic bitmap, it produces 40,189 lines of Eagle script. Every component is tagged with attributes identifying its position on the schematic and the chip bitmaps.

It took 3 minutes 50 seconds for Eagle 6.2.0 to digest the script on my main Linux system. That system was built for the specific purpose of building large software projects, so it's probably not a good benchmark. One of the tech support folk at CadSoft USA ran the same script on his Windows-based general-purpose computer, and he said it took 20 minutes. If printed 1:1 scale, the resulting schematic would measure 100.5" x 81.25" (or 2.55m x 2.06m). Here's a screen-shot of the schematic editor:

Anyone have a really large format printer? Even the Really Big Plotter we have at work won't handle a sheet that wide. Fortunately, I don't need to print it.


  1. The Fed Ex Office near me has an OCE large-format B/W printer.

    1. Hi Tim. Full-scale, the schematic would be 81.25"x 100.5". The largest printers I can find locally will take 36" x 48" paper so I'd need to reduce it to 40% to make it fit, or print it in sections.

      What I did was break the master schematic into 16 ANSI "D" sheet pages (22" × 34", or roughly ISO A1). These are just readable when reduced 50% and printed on 11" x 17" (Tabloid) paper. I then created a separate Eagle project for each of the 5 boards. The individual projects contain the subset of sheets defining that board, plus a common sheet that describes the inter-board connectors.