Arithmetic Logic Unit board fully routed

 Here's the Arithmetic Logic Unit board:

All nets have been routed, and the design rule checks run without error. 

ALU board bottom layer tracks

It's a coincidence that I'm working on the boards in the order of decreasing component count. It's interesting to me that, despite this, the boards have gotten progressively harder to route. As can be seen in the images, the board is fairly densely packed with components. Each of the components on these boards have at least one lead connecting to either power or ground through a via, plus any vias needed to reach the other two signal routing areas, so there are a lot of vias. I tried to place the vias so they lined up to leave routing channels between them but this has not always been practical. This has sometimes made it challenging to get tracks routed from one side of the board to the other side. where there are a lot of them.

ALU board inner layer tracks

My layout strategy for the ALU (and ID) boards was to use the bottom layer for tracks running east/west, and the inner layer for tracks running north/south. This view of just the inner layer tracks shows that these tracks do a pretty good job of chopping the board up. Although I really doubt there's a need to worry about it, merging the inner layer with the power plane would play havoc with return current paths for the bottom layer signals.

Since I only have three signal layers, one idea is to stay with a 6-layer stackup but add a second ground plane behind the bottom layer. The power plane then would get moved to the unused inner layer. That way each of the signal layers is adjacent to a ground plane, though with the default JLCPCB stackup the inner signal layer will be much closer to the power plane than a true ground plane. I'm sure I'm overthinking this, but due to manufacturing processes it's a case of "Buy 5 layers and get the 6th layer free!"

Before I send the ALU and Instruction Decoder boards off for fabrication, I'm going to put some annotations on the top silkscreen layer to make it easier to identify subcircuits and significant signals.  If I don't get badly distracted this weekend I expect I'll send them both off early next week. I hope to get them back two weeks after that.