Saturday morning I woke up way too early and couldn't get back to sleep, so I worked some more on the Verilog version of the MCS-4 system.
I started by coding a Verilog implementation of the Intel 4001, a combination of a 256 x 8-bit read-only memory and a 4-bit I/O port. No Flash ROM this chip, it was programmed to order during manufacturing by Intel, along with the configuration of the I/O port. The 4004 CPU could address up to 16 of these, giving a maximum program address space of 4096 bytes. The Busicom 141 calculator used four of these to store its program, with an optional fifth that implemented the square-root function. Firmware updates required replacing the chips — not something one did willy-nilly.
Of course, my version has an important refinement: the program is loaded from a text file containing the hexidecimal representation of the program code. In simulation this is done when the simulator starts, but the XST synthesizer can merge this into the bitstream used to program a real Xilinx FPGA. This will allow me to create a complete virtual MCS-4 system within the FPGA.
When it looked like I'd worked out the bugs in the 4001, I created a test bench that would connect the 4004 to a 4001 loaded with the test program supplied with Lagos Kintli's simulator and tried running the system. Unfortunately there were bugs, always bugs. Fatigue set in and I ended up taking a long afternoon nap.