Thursday, September 20, 2012

The entire i4004 CPU in Verilog

It seems weird that, after wrestling with a Verilog implementation of the i4004 CPU off and on since 2009, it would require only about 1250 lines of actual behavioral Verilog code (about 200 more in blank lines and comments). I was really expecting it to take a lot more, though I don't know why as that's about one line for every two transistors, and a lot of that is port definition stuff.

Of course it doesn't quite work yet. I tracked down one bug caused by an errant tilde — the "L" signal was inverted from what it should be, causing havoc on the data bus. Even with that fixed it still doesn't work. Debugging is being hindered by another sort of bug: I'm running a 101.8F (38.8C) fever. Yes, I seem to have caught the flu or whatever is going around.

Once I get it working I'll look into posting the code to the OpenCores site, and the 4004 35th Anniversary website if they'll have it. Since it's derived from the Intel schematics it will carry the same non-commercial Creative Commons license, but I really can't see that many people clamoring to use an implementation of a 42 year old design in a commercial product.

I think I'm going to order a pizza and see what's on TV. If I have the attention span for TV.

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